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A resistor ladder digital-to-analog converter $\text{(DAC)}$ receives a digital input that results in the circuit having the state as shown in the figure. For this digital input, the Thevenin voltage, $V_{th},$ and Thevenin resistance, $R_{th},$ as seen at the output node are _________

  1. $V_{th} = 0.5 \; \text{V}, R_{th} = 1 \; \text{k}\Omega$
  2. $V_{th} = 0.5 \; \text{V}, R_{th} = 2 \; \text{k}\Omega$
  3. $V_{th} = 1 \; \text{V}, R_{th} = 1 \; \text{k}\Omega$
  4. $V_{th} = 1 \; \text{V}, R_{th} = 2 \; \text{k}\Omega$
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