In the circuit shown, the initial binary content of shift register $A$ is $1101$ and that of shift register $B$ is $1010.$ The shift registers are positive-edge triggered, and the gates have no delay.
When the shift control is high, what will be the binary content of the shift registers $A$ and $B$ after four clock pulses?
- $A=1101, B=1101$
- $A=1110, B=1001$
- $A=0101, B=1101$
- $A=1010, B=1111$