Recent questions tagged multiple-selects / GO Instrumentation

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GATE IN 2022 | Question: 12
In which of the following bridge(s) is the balancing condition frequency-independent? Maxwell bridge Wien bridge Schering bridge Wheatstone bridge

In which of the following bridge(s) is the balancing condition frequency-independent?Maxwell bridgeWien bridgeSchering bridgeWheatstone bridge

Lakshman Bhaiya

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Lakshman Bhaiya asked Mar 20, 2022

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GATE IN 2022 | Question: 13
The output $\text{F}$ of the digital circuit shown can be written in the form(s) __________ $\overline{A \cdot B}$ $\overline{A} + \overline{B}$ $\overline{A+B}$ $\overline{A} \cdot \overline{B}$

The output $\text{F}$ of the digital circuit shown can be written in the form(s) __________$\overline{A \cdot B}$$\overline{A} + \overline{B}$$\overline{A+B}$$\overline{A...

Lakshman Bhaiya

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Lakshman Bhaiya asked Mar 20, 2022

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GATE IN 2022 | Question: 14
Given $\text{M} = \begin{bmatrix} 2 & 3 & 7 \\ 6 & 4 & 7 \\ 4 & 6 & 14 \end{bmatrix},$ Which of the following statement(s) is/are correct? The rank of $\text{M}$ is $2$ The rank of $\text{M}$ is $3$ The rows of $\text{M}$ are linearly independent The determinant of $\text{M}$ is $0$

Given $\text{M} = \begin{bmatrix} 2 & 3 & 7 \\ 6 & 4 & 7 \\ 4 & 6 & 14 \end{bmatrix},$ Which of the following statement(s) is/are correct?The rank of $\text{M}$ is $2$The...

Lakshman Bhaiya

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Lakshman Bhaiya asked Mar 20, 2022

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GATE IN 2022 | Question: 39
The matrix $\text{A} = \begin{bmatrix} 4 & 3 \\ 9 & -2 \end{bmatrix}$ has eigenvalues $-5$ and $7.$ The eigenvectors(s) is/are __________ $\begin{bmatrix} 1\\ 1 \end{bmatrix}$ $\begin{bmatrix} 3\\ 4 \end{bmatrix}$ $\begin{bmatrix} 2\\ -6 \end{bmatrix}$ $\begin{bmatrix} 2\\ 8 \end{bmatrix}$

The matrix $\text{A} = \begin{bmatrix} 4 & 3 \\ 9 & -2 \end{bmatrix}$ has eigenvalues $-5$ and $7.$The eigenvectors(s) is/are __________ $\begin{bmatrix} 1\\ 1 \end{bmat...

Lakshman Bhaiya

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Lakshman Bhaiya asked Mar 20, 2022

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GATE IN 2022 | Question: 40
For the complex number $z= \frac{a+jb}{a-jb},$ where $a>0$ and $b>0.$ Which of the following statement(s) is/are true? The phase is $2 \; \tan^{-1}\frac{b}{a}$ The phase is $ \; \tan^{-1}\frac{2b}{a}$ The magnitude is $1$ The magnitude is $\sqrt{\frac{a^{2}+b^{2}}{a^{2}-b^{2}}}$

For the complex number $z= \frac{a+jb}{a-jb},$ where $a>0$ and $b>0.$Which of the following statement(s) is/are true?The phase is $2 \; \tan^{-1}\frac{b}{a}$The phase is ...

Lakshman Bhaiya

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Lakshman Bhaiya asked Mar 20, 2022

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GATE IN 2021 | Question: 9
The step response of a circuit is seen to have an oscillatory behavior at the output with oscillations dying down after some time. The correct inference$\text{(s)}$ regarding the transfer function from input to output is/are that it is of at least second order that it has at least one pole-pair that is underdamped that it does not have a real pole that it is a first order system

The step response of a circuit is seen to have an oscillatory behavior at the output with oscillations dying down after some time. The correct inference$\text{(s)}$ regar...

Arjun

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Arjun asked Feb 19, 2021

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GATE IN 2021 | Question: 10
For a $4$-bit Flash type Analog to Digital Convertor $\text{(ADC)}$ with full scale input voltage range $\text{"V"}$ which of the following statement$\text{(s)}$ is/are true? The $\text{ADC}$ requires $15$ comparators The $\text{ADC}$ requires one $4$ to $2$ priority encoder and $4$ comparators A change in the ... $\text{MSB}$ of the output A change in the input voltage by $\frac{V}{16}$ will always flip the $\text{LSB}$ of the output

For a $4$-bit Flash type Analog to Digital Convertor $\text{(ADC)}$ with full scale input voltage range $\text{"V"}$ which of the following statement$\text{(s)}$ is/are t...

Arjun

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Arjun asked Feb 19, 2021

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GATE IN 2021 | Question: 11
A $16$-bit microprocessor has twenty address lines ($A_{0}$ to $A_{19}$) and $16$ data lines. The higher eight significant lines of the data bus of the processor are tied to the $8$-data lines of a $16$ Kbyte memory that can store one byte in each of its $\text{16K}$ address locations.The memory chip ... only $A_{19}$ to $A_{14}$ for generating chip select The above chip cannot be interfaced as the width of the data bus of the processor and the memory chip differs

A $16$-bit microprocessor has twenty address lines ($A_{0}$ to $A_{19}$) and $16$ data lines. The higher eight significant lines of the data bus of the processor are tied...

Arjun

2.9k points

Arjun asked Feb 19, 2021