Recent questions tagged latch

The two inputs $A$ and $B$ are connected to an $R-S$ latch via two $AND$ gates as shown in the figure. If $A=1$ and $B=0$, the output $Q\overline{Q}$ is$00$$10$$01$$11$

In the circuit shown, the switch is momentarily closed and then opened. Assuming the logic gates to have equal non-zero delay, at steady state, the logic states of X and ...