Recent questions tagged sequential-circuit

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The table shows the present state $\mathrm{Q}(\mathrm{t})$, next state $\mathrm{Q}(\mathrm{t}+1)$, and the control input in a flip-flop. Identify the flip-flop.$$\begin{a...
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A $10$ $^1/_2$ digit Counter-timer is set in the 'frequency mode' of operation (with $T_{s}=1 s$). For a specific input, the reading obtained is $1000$. Without disconnec...
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Given below is the diagram of a synchronous sequential circuit with one $\text{J-K}$ flip-flop and one $\text{T}$ flip-flop with their outputs denotes as $\text{A}$ and $...
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Two flip-flops are interconnected as shown in the figure. The present state of the flip flops are: $A=1, B=1$. The input x is given as $1,0,1$ in the next three clock cyc...
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A $6\frac{1}{2}$ digit timer-counter is set in the ‘time period’ mode of operation and the range is set as ‘ns’. For an input signal, the timer-counter displays $1000000$...
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The two inputs $A$ and $B$ are connected to an $R-S$ latch via two $AND$ gates as shown in the figure. If $A=1$ and $B=0$, the output $Q\overline{Q}$ is$00$$10$$01$$11$
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The circuit shown in the figure below uses ideal positive edge-triggered synchronous J-K flip flops with outputs X and Y. If the initial state of the output is X =0 and Y...
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A synchronous counter using two J-K flip flops that goes through the sequence of states: $Q_1Q_2=00\rightarrow10\rightarrow01\rightarrow11\rightarrow00 \dots$ is required...
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In the circuit shown, the switch is momentarily closed and then opened. Assuming the logic gates to have equal non-zero delay, at steady state, the logic states of X and ...
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The digital circuit shown below uses two negative edge-triggered D-flip-flops. Assuming initial condition of $Q1$ and $Q0$ as zero, the output $Q1Q0$ of this circuit is $...
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The state transition diagram for the logic circuit shown is
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Consider the given circuit.In the circuit, the race rounddoes not occuroccurs when $\text{CLK}=0$occurs when $\text{CLK}=1$ and $\text{A=B=1}$occurs when $\text{CLK=1}$ a...
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A 2-bit synchronous counter using two $J-K$ flip flops is shown. The expressions for the inputs to the $J-K$ flip flops are also shown in the figure. The output sequence ...
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