Recent questions tagged synchronous-counter

The circuit shown in the figure below uses ideal positive edge-triggered synchronous J-K flip flops with outputs X and Y. If the initial state of the output is X =0 and Y...

A synchronous counter using two J-K flip flops that goes through the sequence of states: $Q_1Q_2=00\rightarrow10\rightarrow01\rightarrow11\rightarrow00 \dots$ is required...

A 2-bit synchronous counter using two $J-K$ flip flops is shown. The expressions for the inputs to the $J-K$ flip flops are also shown in the figure. The output sequence ...