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Questions by soujanyareddy13
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121
GATE2017: 11
If a continuous-time signal $x(t)=\cos(2\pi t)$ is sampled at $ \text{4 Hz}$, the value of the discrete-time sequence $x(n)$ at $n=5$ is $-0.707$ $-1$ $0$ $1$
If a continuous-time signal $x(t)=\cos(2\pi t)$ is sampled at $ \text{4 Hz}$, the value of the discrete-time sequence $x(n)$ at $n=5$ is$-0.707$$-1$$0$$1$
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Nov 1, 2020
Others
gate2017-in
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122
GATE2017: 12
The Region of Convergence $\text {(ROC)}$ of the $\text Z$-transform of a causal unit step discrete-time sequence is $|z|<1$ $|z|\leq1$ $|z|>1$ $|z|\geq1$
The Region of Convergence $\text {(ROC)}$ of the $\text Z$-transform of a causal unit step discrete-time sequence is $|z|<1$$|z|\leq1$$|z|>1$$|z|\geq1$
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Nov 1, 2020
Others
gate2017-in
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123
GATE2017: 13
The term hysteresis is associated with $\text{ON-OFF control}$ $\text{P-I control}$ $\text{Feed-forward control}$ $\text{Ratio control}$
The term hysteresis is associated with $\text{ON-OFF control}$$\text{P-I control}$$\text{Feed-forward control}$$\text{Ratio control}$
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Nov 1, 2020
Others
gate2017-in
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124
GATE2017: 14
The differential amplifier, shown in the figure, has a differential gain of $A_d=100$ and common mode gain of $A_c=0.1$. If $V_1=5.01\;\text{V}$ and $V_2=5.00\;\text{V}$, then $\text{Vo}$, in $\text{volt}$ (up to one decimal place) is ______________.
The differential amplifier, shown in the figure, has a differential gain of $A_d=100$ and common mode gain of $A_c=0.1$. If $V_1=5.01\;\text{V}$ and $V_2=5.00\;\text{V}$,...
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Nov 1, 2020
Others
gate2017-in
numerical-answers
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125
GATE2017: 15
The silicon diode, shown in the figure, has a barrier potential of $0.7\;\text{V}$. There will be no forward current flow through the diode, if $V_{dc}$, in $\text{volt}$, is greater than $0.7$ $1.3$ $1.8$ $2.6$
The silicon diode, shown in the figure, has a barrier potential of $0.7\;\text{V}$. There will be no forward current flow through the diode, if $V_{dc}$, in $\text{volt}$...
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Nov 1, 2020
Others
gate2017-in
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126
GATE2017: 16
The figure shows a phase locked loop. The output frequency is locked at $f_0=5\;\text{kHz}$. The value of $f_i$ in $\text{kHz}$ is _______________.
The figure shows a phase locked loop. The output frequency is locked at $f_0=5\;\text{kHz}$. The value of $f_i$ in $\text{kHz}$ is _______________.
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Nov 1, 2020
Others
gate2017-in
numerical-answers
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127
GATE2017: 17
The condition for oscillation in a feedback oscillator circuit is that at the frequency of oscillation, initially the loop gain is greater than unity while the total phase shift around the loop in $\text{degree}$ is $0$ $90$ $180$ $270$
The condition for oscillation in a feedback oscillator circuit is that at the frequency of oscillation, initially the loop gain is greater than unity while the total phas...
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Nov 1, 2020
Others
gate2017-in
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128
GATE2017: 18
The output $\text V_\circ$ shown in the figure, in $\text{volt}$, is close to $-20$ $-15$ $-5$ $0$
The output $\text V_\circ$ shown in the figure, in $\text{volt}$, is close to$-20$$-15$$-5$$0$
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Nov 1, 2020
Others
gate2017-in
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129
GATE2017: 19
An $8$-bit microcontroller with $16$ address lines has $3$ fixed interrupts i.e., $\text{Int 1}$, $\text{Int 2}$ and $\text{Int 3}$ with corresponding interrupt vector addresses as $0008\text{H}$, $0010\text{H}$ and $0018\text{H}$. To execute a $32$-byte long Interrupt Service Subroutine for $\text{Int 1}$ starting at the address ... contain a $\text{CALL}$ to $\text{ISS1}$ an unconditional $\text{JUMP}$ to $\text{ISS1}$ a condition $\text{JUMP}$ to $\text{ISS1}$ only $\text{ISS1}$
An $8$-bit microcontroller with $16$ address lines has $3$ fixed interrupts i.e., $\text{Int 1}$, $\text{Int 2}$ and $\text{Int 3}$ with corresponding interrupt vector a...
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Nov 1, 2020
Others
gate2017-in
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130
GATE2017: 20
$\text{A}$ and $\text{B}$ are the logical inputs and $\text{X}$ is the logical output shown in the figure. The output $\text{X}$ is related to $\text{A}$ and $\text{B}$ by $X=\overline{A}B+\overline{B}A$ $X=AB+\overline{B}A$ $X=AB+\overline{A}$ $\overline{B}$ $X=\overline{A}$ $\overline{B}+\overline{B}A$
$\text{A}$ and $\text{B}$ are the logical inputs and $\text{X}$ is the logical output shown in the figure. The output $\text{X}$ is related to $\text{A}$ and $\text{B}$ ...
asked
Nov 1, 2020
Digital Electronics
gate2017-in
digital-electronics
combinational-circuits
logic-gates
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